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Physics 3% exam weight

Semiconductors

Part of the JEE Main study roadmap. Physics topic phy-028 of Physics.

By Last updated 3% exam weight

Semiconductors

🟢 Lite — Quick Review (1h–1d)

Rapid summary for last-minute revision before your JEE Main attempt.

A semiconductor is a solid with conductivity between 10⁻⁷ and 10³ S/m, controlled by doping and temperature. Pure Si or Ge is an intrinsic semiconductor; adding a pentavalent impurity (P, As, Sb) gives n-type (electrons majority), and a trivalent impurity (B, Al, Ga) gives p-type (holes majority).

The band gap (E_g) separates the filled valence band from the empty conduction band: 1.1 eV for Si, 0.67 eV for Ge. The Fermi level sits mid-gap in intrinsic material, shifts toward the conduction band in n-type, and toward the valence band in p-type.

The PN junction forms a depletion region with a barrier potential of ~0.7 V (Si) or ~0.3 V (Ge). Forward bias lowers this barrier so current flows easily; reverse bias widens the depletion layer and only a tiny reverse saturation current passes. The Shockley equation governs the diode: I = I₀[exp(eV/kT) − 1].

  • A Zener diode regulates voltage by operating in reverse breakdown at a fixed V_Z.
  • An LED emits light under forward bias; a photodiode detects light under reverse bias.
  • A solar cell is a photodiode driven in forward bias by absorbed photons.

🟡 Standard — Regular Study (2d–2mo)

Standard content for students with a few days to months of preparation.

Energy Bands and Carrier Statistics

In a crystal, atomic orbitals broaden into energy bands. The highest filled band is the valence band; the lowest empty band is the conduction band; the gap between them is the forbidden energy gap E_g. Conductors have overlapping bands; insulators have E_g > 3 eV; semiconductors have E_g between roughly 0.5 and 2 eV.

The intrinsic carrier density follows n_i² = N_c N_v exp(−E_g/kT). Doping shifts this balance: adding donors (N_d) supplies free electrons, so n_e ≈ N_d and n_h = n_i²/N_d. For acceptors (N_a), n_h ≈ N_a. Charge neutrality always holds: n_e + N_a = n_h + N_d.

PN Junction and V-I Characteristics

When p- and n-regions meet, carriers diffuse across the junction, leaving behind ionised dopants that form the depletion region and create a built-in field. At equilibrium, the Fermi level is flat across the device, which forces the bands to bend: bands bend downward on the n-side and upward on the p-side, producing the barrier potential V_bi.

BiasDepletion widthCurrent
Forward (p +, n −)Narrows, barrier reducedLarge, exponential rise after cut-in (~0.7 V Si)
Reverse (p −, n +)WidensTiny reverse saturation current I₀

The Shockley diode equation I = I₀[exp(eV/kT) − 1] captures this asymmetry. At room temperature, kT/e ≈ 25.85 mV.

Special Diodes and Logic Gates

The Zener diode is heavily doped so its depletion layer is narrow; in reverse breakdown it holds a constant V_Z, making it ideal as a shunt voltage regulator. The LED is a forward-biased junction whose band gap matches the emitted photon energy: E_photon = hν ≈ E_g. A photodiode runs reverse-biased, and photon-generated e–h pairs raise the reverse current proportionally to light intensity. A solar cell is a large-area photodiode delivering power under forward-biased illumination, rated by V_oc, I_sc, fill factor, and efficiency.

Logic gates (AND, OR, NOT, NAND, NOR) are built from diode-resistor or transistor switching networks, and their behaviour is fully specified by truth tables. NAND and NOR are universal — any Boolean function can be realised from either alone.

🔴 Extended — Deep Study (3mo+)

Comprehensive coverage for students on a longer study timeline.

Edge Cases and Common Traps

A frequently missed nuance: in n-type, electrons are majority but holes still exist as minority carriers; the same holds symmetrically in p-type. Examiners test this by asking “majority carriers in p-type” — the answer is holes, never electrons.

Reverse saturation current is never zero; it roughly doubles every 10 K rise in temperature, which is why diode curves drift with heat. The cut-in (knee) voltage in textbook V-I plots is barrier-dependent: 0.7 V for Si and 0.3 V for Ge, not a universal 0.7 V.

Zener breakdown (quantum tunnelling in heavily doped, narrow junctions) differs from avalanche breakdown (impact ionisation in lightly doped junctions). Both occur in reverse bias, but only Zener’s flat V_Z is exploited for regulation.

Connection to Devices and Worked Example

A Si diode at 300 K carries I₀ = 10 nA. What is the current when forward biased at 0.7 V? Using I = I₀[exp(V/0.0259) − 1]:

exp(0.7/0.0259) = exp(27.03) ≈ 5.4 × 10¹¹, so I ≈ 10 × 10⁻⁹ × 5.4 × 10¹¹ ≈ 5.4 A — illustrating why forward-biased diodes must be current-limited.

In a solar cell, efficiency η = (V_oc · I_sc · FF) / P_in. Skipping the fill factor (typically 0.7–0.85) inflates η unrealistically.

Practice Prompts

  1. A Ge diode (V_bi ≈ 0.3 V) and a Si diode (V_bi ≈ 0.7 V) are in series, forward biased. Sketch the combined V-I curve and identify the dominant knee.
  2. Build the truth table for (A NAND B) OR (C AND D) and simplify using De Morgan’s law — a common JEE Main logic-gate composite.

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